System on chips (SOCs) include multiple different sub-blocks connected together to perform a function. At least one sub-block is designed to perform a different function from another sub-block of an SOC. During an SOC design process, the sub-blocks are designed in order to perform a desired function. In some instances, the sub-block designs are called intellectual property (IP) blocks or cell designs. These IP blocks or cell designs are stored in a cell library for use by a designer during the SOC design process.
Power consumption for the IP blocks is generally divided into two categories. A power state category includes IP blocks which have a power consumption based on a power state of the IP block. For example, during an operating mode the IP block will consume a first amount of power; while during a sleep mode the IP block will consume a different amount of power. Power consumption for IP blocks in the power state category is typically independent from operation of other IP blocks in the SOC.
A programmable processor category includes IP blocks which have a power consumption base on a specific program being executed by the IP block. For example, during an operation state the IP block executes a first program and has a first power consumption; while the same IP block executing a second program during the operation state has a different power consumption. The power consumption of IP blocks within the programmable processor category depends on more than a power state of the SOC.